The present invention relates to an erasable, programmable read-only semiconductor memory device (hereinafter referred to as EPROM device) having a plurality of erasable, programmable read-only semiconductor memory cells (hereinafter referred to as EPROM cells) of the insulated gate field-effect transistor construction provided with floating gate electrodes and control gate electrodes. More specifically, the invention relates to an EPROM device having EPROM cells of the channel injection type.
In the EPROM device, electric charges such as the electrons can be injected into the floating gate of the EPROM cell by the method of tunnel injection, avalanche breakdown injection, channel injection or F-N injection. The present invention is concerned with an EPROM device of the channel injection type in which the electric current is allowed to flow in a channel region, and hot electrons generated in this region are injected into the floating gate electrode.
In recent years, the EPROM device is widely used since it can be easily manufactured and it can hold the data with high reliability. Moreover, its memory capacity has been greatly increased owing to the reduction in the size of the transistors, i.e., owing to the reduction in the size of the EPROM cells. However, a problem is arising with regard to reduced withstand voltage between the source region and the drain region and reduced breakdown voltage between the drain or source region and the substrate accompanying the reduction in the size of the transistors. Therefore, limitation has been imposed on setting a programming voltage, i.e., on setting a writing voltage, and increasing demand has been placed for programming the memory cells with a low voltage.
In the conventional EPROM of the channel injection type, however, the electric current flows in the same direction both in the writing operation and the reading operation. Voltages of the same polarity are applied to the same impurity regions of drain and source both in the writing operation and the reading operation. Therefore, the voltage in the reading operation must be for lower than that of the writing operation. However, as mentioned above, the recent EPROM device is designed such that with a low voltage the writing operation can be achieved, that is, the writing operation voltage per se is low. Therefore, the difference between the voltage levels in the writing operation and the reading operation becomes small. In this case, hot electrons are gradually injected in the floating gate electrode during the reading operation. The same phenomenon has already discovered in the EPROM of avalanche breakdown injection type and called as unintentional injection writing by Kjell O. Jeppson et al. in "Solid-State Electronics", 1976, Vol. 19, pp. 455-457. The unintentional writing phenomenon must be taken into consideration with respect to not only an ordinary reading voltage but also a surge voltage that generates instantaneously. Therefore, this phenomenon triggers a serious problem from the standpoint of reliability such as change in the data that are held for extended periods of time. Moreover, this problem restricts the freedom of designing and producing the memory cell devices that operate with a low programming voltage.